CD4017BE Decade Counter / Divider, 11 MHz, 1 Gate, 1 Input, 3 V to 18 V, DIP-16
Διαθεσιμότητα : Σε stock 40 Προϊόν(ντα) Άμεσα Διαθέσιμο
Κωδικός προϊόντος :NS3026
Βάρος και διαστάσεις προϊόντος
Βάρος προϊόντος: 0.0800KG
0,40 €
Χωρίς ΦΠΑ : 0,32 €
Περιγραφή
CD4017BE Decade Counter / Divider, 11 MHz, 1 Gate, 1 Input, 3 V to 18 V, DIP-16
CD4017B and CD4022B are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating, and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output is normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes on cycle every 10 clock input cycles in the CD4017B or every 8 clock input cycles in the CD4022B and is used to ripple-clock the succeeding device in a multi-device counting chain.
These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating, and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output is normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes on cycle every 10 clock input cycles in the CD4017B or every 8 clock input cycles in the CD4022B and is used to ripple-clock the succeeding device in a multi-device counting chain.
Applications
Clock & Timing, Embedded Design & Development, System Monitoring, Sensing & Instrumentation, Automation & Process Control
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